Working document on rates and deadtime at nominal luminosity (Au-Au)

2x1026 cm-2 s-1 with beam bunches at 9.1 MHz

standard PHOBOS electronics

S.Manly 7/16/97

 

Level 0 - coincidence in trigger counters

 

pass rate is 10 kHz, 1.2 kHz of Au-Au

evaluate in 200 ns

 

NO do nothing

 

YES disable level 0 trigger, gate phototube ADC’s, stop phototube TDC’s

proceed to Level 1

 

Level 1 - rough vertex from trigger counter timing

 

pass rate is 2 kHz, 1.2 kHz of Au-Au

Effectiveness of this trigger to remove background needs to be studied.

evaluate in 1.2 m s

 

NO fast clear phototube ADC’s and TDC’s

take 1 m s at 8 kHz gives 0.9% deadtime

reenable Level 0

 

YES stop pipeline, start conversion in FEE

proceed to Level 2

 

What do we need to do for pileup protection?

 

Level 2 - not defined (fast multiplicity, better vtx - from Si mult det and/or trigger

counters)

 

pass rate is unknown (assume 100% here)

What is this trigger, what is pass rate?

evaluate in 14 m s

 

NO do not send event to FEC and DAQ

fast clear phototube ADC’s and TDC’s

reenable Level 0

would incur 1 m s deadtime at Level 2 fail rate due to fast clear

 

YES send event to FEC and DAQ

100 m s for FEE readout (no deadtime incurred necessarily)

30 m s for TOF readout

reenable Level 0 once TOF read out

30 m s at 2 kHz (with no gain from Level 2) gives 7% deadtime

proceed to Level 3

 

Level 3 - Si multiplicity cut, calc. done in VME

 

pass rate needs study (assume 20% here, giving 200 Hz)

Determine effectiveness of this trigger.

evaluate at 2 kHz

 

NO do not build event in VME

no deadtime incurred assuming calculation done faster than 2kHz

Determine speed with which this calc. can be done.

 

YES build event in VME

no deadtime incurred if event built fast enough

How fast/what rate can we achieve for building events?

send event to DAQ/online computers

proceed to Level 4

 

Level 4 - physics cuts done in general purpose computer

 

Define trigger possiblities and potential performance.

 

NO do not write event to tape

incur no deadtime if Level 4 trigger calculations done fast enough

YES write event to tape

incur no deadtime if Level 4 trigger calculations done fast enough

 

Working document on rates and deadtime at nominal luminosity (Au-Au)

2x1026 cm-2 s-1 with beam bunches at 9.1 MHz

alternate PHOBOS electronics (VA chip)

S.Manly 7/16/97

 

Level 0 - coincidence in trigger counters

 

pass rate is 10 kHz, 1.2 kHz of Au-Au

evaluate in 200 ns

 

NO do nothing

 

YES disable level 0 trigger, gate phototube ADC’s, stop phototube TDC’s

proceed to Level 1

 

Level 1 - rough vertex from trigger counter timing

 

pass rate is 2 kHz, 1.2 kHz of Au-Au

Effectiveness of this trigger to remove background needs to be studied.

evaluate in 1.5 m s

 

NO fast clear phototube ADC’s and TDC’s

take 1 m s at 8 kHz gives 0.9% deadtime

reenable Level 0

 

YES start readout of VA chip

incur 10 m s deadtime for pileup protection gives 2.2% deadtime

proceed to Level 2

put in hold to allow for Level 2 trigger calculation in 30?? m s

 

What do we need to do for pileup protection?

 

Is there a different timescale that’s relevant here? This needs study. Can you

really abort event once it starts to read out? You would end up with partial events

in the buffer. Can Xilinx deal with this?

Three ways to think of a level 2.

1) abort event readout (which takes 100 m s). Trouble with this is that partial events would be in the buffer and it is not clear how to handle that. Could do abort up to 100 m s if possible.

2) events all go to buffer. TDR board requested to send or skip an event. Readout and calculations are done. This scenario avoids sending the event off the board (500 m s).

This implementation would allow rejected events to go thru readout and calculation (400 m s total). Have 1 ms to evaluate trigger because event is in event buffer (four events deep).

3) put in hold in Level 1. Hold event while taking the time to calculate a decent Level 2 trigger (using an enhanced trigger counter setup??) .... hold for 30 m s or something.

 

Assume option 3 here. Assume trigger pass rate is 500 Hz for jollies.

 

Level 2 - not defined (fast multiplicity, better vtx - from Si mult det and/or trigger

counters)

 

pass rate is unknown (assume 100% here)

What is this trigger, what is pass rate?

Evaluate in » 30 m s

 

NO abort

fast clear phototube ADC’s and TDC’s

reenable Level 0

would incur 30 m s deadtime due to hold while calculating Level 2

gives 5% deadtime

 

YES do not abort, continue readout

100 m s for readout

30 m s for TOF readout

reenable Level 0 once TOF read out

100 m s at 0.5 kHz (with no gain from Level 2) gives 5% deadtime

do zero suppression, etc. on Xilinx and 2 ADSP’s

do readout off TDR board to CFEC thru 5 Mbit/s serial links

very slow to get off chip, 6ms or so

proceed to Level 3

 

Level 3 - Si multiplicity cut, calc. done in VME

 

pass rate needs study (and depends on effectiveness of Level 2 trigger)

Determine effectiveness of this trigger.

Can evaluate at 2 kHz. Going faster does not help because of 0.5 ms limitation above.

 

NO do not build event in VME

no deadtime incurred assuming calculation done faster than 2kHz

Determine speed with which this calc. can be done.

 

YES build event in VME

no deadtime incurred if event built fast enough

How fast/what rate can we achieve for building events?

send event to DAQ/online computers

proceed to Level 4

 

Level 4 - physics cuts done in general purpose computer

 

Define trigger possiblities and potential performance.

 

NO do not write event to tape

incur no deadtime if Level 4 trigger calculations done fast enough

YES write event to tape

incur no deadtime if Level 4 trigger calculations done fast enough