Block Diagram of the PCD

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dECL

to

TTL

TTL

to

dECL

dTTL

to

TTL

to

dTTL

MC10ELT25

MC10ELT24

SN74LBC978

HIGH

ADR

SEL

A23-A8

A7-A1

AM5-AM0

AS

LWORD

IACK

DS0-DS1

WRITE

IACKIN

DTACK

BERR

IACKOUT

IRQn

D00-D16

SYSCLK

FIFO

64Kx18

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DP0-DP15

STROBEs

DIRs

CPI0-CPI15

CPO0-CPO15

16MHz

64MHz

C/ST FIFO

SEL

ispLSI3320-100

INPUT CONTROL PORT

16 bit, 34pins connector

OUTPUT CONTROL PORT

16 bit,34pins connector

I/O DATA PORT

16 bit DATA+2 STROBEs

40pins connector

VME P1 connector

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