The following pictures have been taken after run 11600 have ended. All T0 signals have been measured at the patch panel (2 lower rows of the Fastbus rack). ADC gate is taken from CAT module.
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Fig.
303191049. T0P9. Scope trigger: ADC Gate. Trigger configuration: SPEC.TOF. |
Fig. 303191042. T0N9. Scope trigger: ADC Gate. Trigger configuration: SPEC.TOF. |
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Fig. 303191020. T0P9. Scope trigger: T0P9. Trigger configuration: dAPeripheral. |
Fig. 303191011. T0P9. Scope trigger: T0P9. Trigger configuration: dAPeripheral. |