DTDC
PhLoM
MVME
100 Mbps
CC
mCC L0
L1/
evN
•Standard VME crate
•DTDC – Data driven TDC, VME A24D32 module based on the HPTDC chip. 32/64 dECL
channels (25/100 ps
resolution)
•MVME – standard VME CPU
•PhLoM – Phobos Logic Module
•Busy-free
a
We expect rather low data rate, 6
MB/s max, this correspond
to 15K hits/sec. Therefore Slink is not necessary. This greatly simplifies the integration to the existing DAQ. The data will
be sent to event builder
over Fast Ethernet exactly like it is done in the existing VME crate.
Problem. Current version of the HPTDC have a
bug in L1 memory
especially when chip runs at Vcc>2.4 V
Workaround. It is proven in KABES that it is possible to run at Vcc=2.4 V. In a
worst case scenario we will
have resolution 98 ps (48 ps RMS)
PhTiMes