Checked 7/21/00. Prepared by Andrei Sukhanov.
A sketch of the L0/L1 logic can be found here.
| Name | Source module | TDC slot # |
Chan nel # |
Virtual detector |
Trig bit |
Valid since | Note | |
| PN | A1C | 9 | 48 | GX00 | 0 | At least 1 hit in negative paddle counter. 3 | ||
| PP | A1D | 9 | 49 | GX01 | 0 | At least 1 hit in positive paddle counter. 3 | ||
| CC Blue | C12B | 9 | 50 | GX02 | 0 | Blue crossing clock | ||
| PNPP(n) wide | C4B-A8C | 9 | 51 | GX03 | 6/02 | 1 | Wide coincidence PN(n)*PP(n). Previously it was CC_delayed from B5B | |
| PNPP wide | C4A-B4A-A2C | 9 | 52 | GX04 | L0.11 | 0 | PN*PP coincidence | |
| ZTrig | D4A | 9 | 53 | GX05 | L1.7 | 0 | ZN ZP narrow coincidence | |
| L0 | G11C | 9 | 54 | GX06 | 0 | Slightly delayed L0. | ||
| L1 | TML1O0 | 9 | 55 | GX07 | 0 | Generated by TML1 board. | ||
| ZN | D6A | 9 | 56 | GX08 | 2 | At least 1 hit in negative ZCal | ||
| ZP | D6C | 9 | 57 | GX09 | 2 | At least 1 hit in positive ZCal | ||
| Centrality Trigger |
A12B | 9 | 58 | GX0A | 5404S4 | 0 | Previously it was PN>2 from A9A | |
| PP(n) | A9B | 9 | 59 | GX0B | 3 | At least n hits in positive paddle counter | ||
| CC Yellow | C12C | 9 | 60 | GX0C | 0 | Yellow crossing clock. applied 5/26/00, run 3120 | ||
| PNPP(n) narrow | C4C-A8B | 9 | 61 | GX0D | 6/04 | 0 | narrow coincidence | |
| PNPP narrow | C4D-A2B | 9 | 62 | GX0E | 6/04 | 0 | narrow coincidence | |
| ADCGate | G6B | 9 | 63 | GX0F ~G11B |
6/08 run-3777 |
3 | ADC6 Gate for Paddles TOF Gate |
Note 1
The Notation L0.11 means that this trigger goes to TML0 board input 11. It can be read back as bit 11 at L0 latch register using GetTrigL0Latch()&0x800
Note 2
On 05/23/00 at 1000 (run 3060 Paddle Cosmic) the delay cable for all trigger time signals (TDC09 channels 48:63) were changed from 150 ns to 190 ns
Before 05/23/00 at 1000 ((run 3060 Paddle Cosmic) the PN and PP signals were connected to A1A, A1B respectively.
The scaler is Caen Model V560N. This is 16 channel 32-bit scaler. It is cleared only on program restart. The scaler value can be obtained using TPhEventBufferInfo::GetScaler(index)
| Scaler Channel |
Name | Source | Valid since |
Notes |
| 0 | ZP*ZN narrow | C3.6-D3B | 7/10/00 | Before 7/10 it was connected to D2C |
| 1 | PN*PP wide | B4A-A2C | 5/1/00 | wide range 38 ns |
| 2 | ZN | C3.9-D6A | 5/1/00 | |
| 3 | ZP | C3.10-D6B | 5/1/00 | |
| 4 | PP | A1B | 5/1/00 | 07/21 It was always connected to A1B |
| 5 | PN | A1A | 5/1/00 | |
| 6 | PN*PP narrow | A2B | 6/2/00 | narrow coincidence |
| 7 | PNPP(n) narrow | A8B | 6/4 | narrow coincidence |
| 8 | PNPP(n) wide | A8C | 6/15 | wide coincidence. Between 6/14 and 6/15 it was mistakenly connected to A2B |
| 9 | ZP*ZN wide | D3C | 7/10/00 | |
| 10 | ZN*ZP 10ns*CC | D8A | 08/09/00 | This signal is delivered to RHIC |
| 11 | L1.1Acc | TML1.CO.3- G5.03 | 08/11/00 | Number of accepted PN*PPnarrow triggers (L1.1) |
| 12 | ||||
| 13 | ||||
| 14 | ||||
| 15 | CC | C3.13-C12.2 | 6/6 | Crossing clock, yellow. |
Trigger bits of the L0 board. Accessible using TPhEventBufferInfo::GetTrigL0Latch()
| L0 bits |
Name | Source | Valid since |
Notes |
| 0 | reserved | |||
| 1 | reserved | run 3525 | ||
| 2 | reserved | run 3525 | ||
| 3 | reserved | run 3525 | ||
| 4 | reserved | run 3525 | ||
| 5 | reserved | |||
| 6 | reserved | |||
| 7 | reserved | |||
| 8 | Heartbeat | 06/05/00 | Heartbeat generator T=8sec. Provides triggers in absence of the beam for Si monitoring. | |
| 9 | TimeCal | 01/01/00 | Time calibrator. It is ON for plastic time calibration runs | |
| 10 | Pedestal | run 3525 | 100 Hz generator, switched on for Si Pedestal Run | |
| 11 | reserved | run 3525 | before 06/14 it was PN*PP | |
| 12 | PN*PP wide | run 3525 | Our main trigger so far | |
| 13 | reserved | run 4296 | ZTrig | |
| 14 | CC | Crossing clock | ||
| 15 | Veto | External signal to veto L0 board. Should never be seen. |
Trigger bits of the L1 board. Accessible using TPhEventBufferInfo::GetTrigL1Latch()
| L1 bits |
Name | Source | Valid since |
Notes |
| 0 | L0 | Output of the L0 board. | ||
| 1 | PN>2*PP>2 narrow | C4C-A8B | run 4982 | Most interesting trigger. For runs 3525:4982 the PNPP narrow was here. Before the run 3540 The CC was connected and coinc. level was 2 |
| 2 | reserved | ZTrig | Prescaler for ZCAL | |
| 3 | PNPP narrow | C4D-A2B | run 4982 | Moved here from L1.1 |
| 4 | reserved | |||
| 5 | reserved | |||
| 6 | reserved | run 3535 run 3540 |
PNPP(n) wide A8C moved here from L1.1 (was
there since 3525) due to problems in L1 board Removed. |
|
| 7 | 0 | 01/01/00 | ||
| 8 | 0 | |||
| 9 | 0 | |||
| 10 | 0 | |||
| 11 | 0 | |||
| 12 | 0 | |||
| 13 | 0 | |||
| 14 | L1 | Output signal. | ||
| 15 | Busy | Generated inside the L1 board |