Trigger Readout Connection Table

Valid since 04/19/00. Prepared by Andrei Sukhanov.

Name Source module TDC
slot #
Chan
nel #
Virtual
detector
Trig
bit
Valid since Note
PN A1C 9 48 GX00     At least 1 hit in negative paddle counter. 3
PP A1D 9 49 GX01     At least 1 hit in positive paddle counter. 3
CC Blue C12B 9 50 GX02     Blue crossing clock
PNPP(n)CC A8C 9 51 GX03   6/02 Wide coincidence PN(n)*PP(n)*CC. Previously it was CC_delayed from B5B
PNPPCC A2C 9 52 GX04 L0.11   PN*PP*CC coincidence
ZTrig D5A 9 53 GX05 L1.7   At least 1 hit in ZCal
TOFGate G11B 9 54 GX06     Delayed L0. Applied to TOF ADCs
L1 TML1O0 9 55 GX07     Generated by TML1 board.
ZN D4B 9 56 GX08     At least 1 hit in negative ZCal
ZP D4C 9 57 GX09     At least 1 hit in positive ZCal
PN(n) A9A 9 58 GX0A     At least n hits in negative paddle counter
PP(n) A9B 9 59 GX0B     At least n hits in positive paddle counter
CC Yellow C12C 9 60 GX0C     Yellow crossing clock. applied 5/26/00, run 3120
PNPP(n)CC A8B 9 61 GX0D   6/04 narrow coincidence
PNPPCC A2B 9 62 GX0E   6/04 narrow coincidence
PaddleGate G5C 9 63 GX0F   6/08 ADC6 Gate for Paddles

Note 1

The Notation L0.11 means that this trigger goes to L0 board input 11. It can be read back as bit 11 at L0 latch register using GetTrigL0Latch()&0x800

Note 2

On 05/23/00 at 1000 (run 3060 Paddle Cosmic) the delay cable for all trigger time signals (TDC09 channels 48:63) were changed from 150 ns  to 190 ns

Note 3

Before 05/23/00 at 1000 ((run 3060 Paddle Cosmic) the PN and PP signals were connected to A1A, A1B respectively.

 

Trigger Scalers Connection Table

The scaler is Caen Model V560N. This is 16 channel 32-bit scaler. It is cleared only on program restart. The scaler value can be obtained using TPhEventBufferInfo::GetScaler(index)

Scaler
Channel
Name Source Valid
since
Notes
0 ZTrig D2C 5/1/00  
1 PN*PP A2C 5/1/00 wide range 38 ns
2 ZN D4B 5/1/00  
3 ZP D4C 5/1/00  
4 PN A1A 5/1/00  
5 PP A1B 5/1/00  
6 PN*PP
collision
A2B 6/2/00 narrow coincidence
7 PNPP(n)CC A8B 6/4 narrow coincidence
8 PNPP(n)CC A8C 6/15 wide coincidence. Between 6/14 and 6/15 it was mistakenly connected to A2B
9        
10        
11        
12        
13        
14        
15 CC C12B 6/6 Crossing clock.

 

Trigger bits

Trigger bits of the L0 board. Accessible using TPhEventBufferInfo::GetTrigL0Latch()

L0
bits
Name Source Valid
since
Notes
0 reserved      
1 Busy L1   01/01/00 Goes to Silicon. Does not trigger. For diagnostics of Silicon readout
2 L1 to Si   01/01/00 Does not trigger. For diagnostics of Silicon readout
3 Busy L2   01/01/00 From Silicon. Does not trigger. For diagnostics of Silicon readout
4 L2 to Si   01/01/00 Does not trigger. For diagnostics of Silicon readout
5 reserved      
6 reserved      
7 reserved      
8 Generator   06/05/00 Heartbeat generator T~200sec. Provides triggers in absence of the beam for Si monitoring
9 TimeCal   01/01/00 Time calibrator. It is ON for plastic time calibration runs
10 reserved      
11 reserved     before 06/14 it was PN*PP
12 PN*PP   06/14/00 Our main trigger so far
13 reserved      
14 CC     Crossing clock
15 Veto     External signal to veto L0 board. Should never be seen.

 

Trigger bits of the L1 board. Accessible using TPhEventBufferInfo::GetTrigL1Latch()

L1
bits
Name Source Valid
since
Notes
0 L0     Output of the L0 board. Problem seeing this bit in the data: It is always 0.
1 PNPPnarrow A2B 3525 Before the run 3540 The CC was connected and coinc. level was 2
2 reserved     having problems writing it
3 reserved     having problems writing it
4 reserved     having problems writing it
5 reserved     having problems writing it
6 PN3PP3CCwide A8C 3535 Moved here from L1.1 (was there since 3525) due to problems in L1 board
7 ZCAL D2A 01/01/00 ZCAL trigger. Coincidence ZN*ZP
8 0      
9 0      
10 0      
11 0      
12 0      
13 0      
14 L1     Output signal.
15 Busy     Generated inside the L1 board