Scintillator Tiles for Multiplicity Detectors
Y.K.Lee
The array of 36 scintillator tiles were installed at the intersection. The high voltage remote control, the signal cables to the hut, and the mechanism for mounting the counter around the intersection were all in place. The electronics for fast signals to be included in the
level-0 trigger and for the analog signals to the fast-bus ADC's were successfully tested. The monitoring software was used to exhibit individual spectra and the first-order multiplicity spectra.
With the available beam-gas events, the response of each scintillator tile was studied. Majority of tiles show clean pedestals and the well separated peak for the single minimum ionization particle (1-MIP). The 1-MIP peak falls 100 to 200 channels above the pedestal, so that the 32K channel LeCroy 1885f ADC can cover the highest multiplicity expected. For a few tiles with low-gain photomultiplier tubes the 1-MIP peak was not completely resolved from the pedestal, and further adjustment with high voltage is called for. No light leak or damage by bending of the fragile fibers was detected.
For each tile 5% of the signal was split off passively and connected to LeCroy 4413 discriminator. The discriminator outputs were analyzed by majority logic, and the result was included in the trigger. For most of the commissioning period the majority logic was set for double coincidences with each discriminator set for 1-MIP or even lower.
During the commissioning period it became clear that calibration of each tile with 1-MIP and 2-MIP peaks with beam, possibly in real time, was the way to go. For the fast channel the LeCroy 4413 discriminator with common discrimination level calls for adjustment of the signal size by high voltage. These are the adjustment we were not quite able to do during the last period. The adjustment of the signal size within 5 % by changing high voltage is a rather laborious
process in view of the fact that two photo multipliers are now sharing each output of the HV supply.
The rest of the 4 scintillator tiles were left at the test bench with multi wire chambers in lab for further characterization. Uniformity of response over the area including the groove for the fibers and the edge-effects are being evaluated with high statistics. When this study is completed within a few weeks the documentation will follow.
In order to clearly seperate the 1-MIP peaks from pedestals, two Hamamatsu H3178-61 phototube assembly should be replaced. In order to provide the individual control of the photube outputs that are sent to 16-channel discriminators with common discrimination level each phototube needs independent high voltage connection which requires another LeCroy 4032.
R.Debbe
The C1 threshold detector was installed on the Front Forward Platform as a complete system.
The radiator volume was filled with pure C4F10 using an evacuation vessel in order to be able to make a decent vacuum (milli Torr) without subjecting the detector to pressure differentials. The evacuation and filling of was done in two steps : first the vessel and detector were evacuated and left overnight to monitor for leaks with an analogue absolute pressure gauge. The next day the connection between detector and vessel was closed and the C4F10 gas was introduced slowly while the pressure differential between evacuation vessel and detector was monitored with a differential gauge, this process lasted four hours. Once the detector was filled with gas it was installed on the platform and surveyed. I instructed the surveyors about the points to be measured
but I have not heard of their results. All high voltage and signal cables were connected and tested, the line noise of the system is very small; typically 2 mV peak to peak. The LED drivers were also installed even though three of the 14 channels did not function, possibly because of a faulty transistor. The LED drivers are mounted in a NIM bin on the platform and are triggered with a pulser located on the FEH. The timing of this system was tested but no ADC distributions were produced. This is a task that will be performed promptly.
The signal from the C1 detector when beam circulated in the collider was timed for Beam-Beam trigger, and ADC spectra produced. At this moment we cannot say much more about the performance of the detector besides the fact that light was collected at the time other detector like Beam-Beam and tiles indicated interactions in the IR.
The amount of light leaking into the detector at the IR is higher that the one seen at the lab. This is certainly due to the bright lights at the IR. Some effort was invested to reduce these leaks but a simpler solution would be to dim the lights during collider operations.
The pressure differential between ambient and the radiator volume is monitored continuously and there are no signs of gas leaks .
F.Videbaek
The conventional trigger system put together for the commissioning run had the following components
The LVL1 was not completely implemented in so far no provisions for delayed decisions and reset/abort of the processors was implemented.
LVL0 triggers
The trigger logic for the Beam Beam counters using a second set of CAMAC discriminators, programmable ECL delay and Majority LogicUnits (MALU) for right and left array was commissioned. Two sets of triggers were build in NIM indicated low and high hit rate in left and right array and within a time overlap of 20 nsec. The choice of 20 nsec was used to check out logic and performance with beam only circulating in one direction. For colliding beam a narrower overlap of about 5 nsec will be used. The delays from the beam beam PMTs are not all the same due to cable length and transitions time differences. In order to determine the actual delay differences between the tubes just before the entry to the MALUs the second output of the delay boxes were fed on 34 pin twisted pair cable to a L1876 (1877) fasbus TDC. This allows us both to determine the time differences (0-15 nsec) between cables as well as monitor hits in the PMT before and after the selected event.
The DAQ requires a synchronization trigger implemented as a fixed time pulser. The level 0 logic is built such that a special interrupt is given to the processors on such events . The action in the processor though results in a normal readout, making this trigger also useful as a mixed in pedestal trigger.
Additional triggers were build based on ZDCs, Mult tiles, and C1 LED to a large degree for detector checkout.
Level 0 logic
The level 0 logic was implemented using NIM modules and a VME pre-scaler. The control of which trigger inputs (out of 7+1) possible are enabled as well as there respective scaledown factors is controlled by levels set by CAMAC output registers, in turn controlled by a GUI written in perl/TK. The busy and interrupts enabled is also controlled by the same interface. During most of the commissioning the readout controlled was the camac and Fastbus in the Hut. It was checked that the interrupt, busy circuitry for the TPC receiver modules also worked with the logic. Trigger masks are read out on a per event basis.
Gates and timing.
The trigger system was commissioned as far as possible considering the meager amounts of stable beam. Preliminary timing for ADC and TDC gates for the H1, C1, MULT, Beam-beam and ZDCs was achieved (at 10-20 nsec level). So far all delay cables for ADC and TDC have very satisfactory insertion time with no problems for gate distribution and re-generation.
Tasks
The timing between triggers were done at this same level. The timing with the RHIC RF was not achieved, in part due to problems with the VT124 RHIC control group vme modules of which we have received a prototype.
The more complete level1 part of the trigger i.e. using aborts has to be put together and tested with the DAQ.
The Crate layout is not satisfactory and should be re-done. Cables in particular between crates must be clearly labeled.
On the software side the actual settings should be recorded in a logfile as well as in a run-conditions database. The current status should be accessible from the Web.