On Fri, Mar 23, 2001 at 01:27:38PM +0100, Christian Holm Christensen wrote: > On Thu, 22 Mar 2001 22:47:39 -0500 > Konstantin Olchanski <olchansk@ux1.phy.bnl.gov> wrote > concerning ": Proposal for T4-T5 unpacking format": > > > > prompt wires 1 through 99 are defined as channel numbers 1 through > > 99 (same as T3). delayed wires 1 through 99 are defined as channel > > numbers 101 through 199. > > Since the TDC records are 8 bit objects, why not split it into two 4 > bit "psuedo-object", so that prompt channel numbers are in the lower 4 > bits, and delayed channel numbers are in the upper 4 bits. > > I.e., channel 4 is "wire 5, prompt" and channel 149 means "wire 22, > delayed". > 1) is there a mistake in the example? wire 22 cannot be encoded into 4 bits (0..15), even by shifting. 2) I guess you meant "mark delayed channels by setting bit 128". This is a valid optimization, it replaces a modulus 100 operation with a cheaper bit mask operation. Also: - it obfuscates the raw data: the definition "channel 103 is wire 3, delayed" is less obscure that "channel 132 is wire 3, delayed". - it is an unnecessary optimization, because surely, the event processing time is dominated by tracking, not by reading T3-T5 raw data, so speeding up raw data unpacking would have no effect on total processing time. 0) the channels numbers are defined as "wire numbers" and there is no "wire zero". Wire numbers are counted starting from one, in every experiment that was ever done. (Counter examples?). P.S. The example in (2) has a mistake: 128+3 = 131, not 132. Did you spot it? P.P.S. I strongly suspect that on modern CPUs the "modulo 100" operation takes one clock cycle to execute, same is bit masks and shifts. I will check and report on this. On MIPS R3000/R4000 CPUs it used to be ~100 clocks (integer division) versus 1 clock (bit ops). K.O. > In this way, you only need to do a shift of bits, > > UShort_t ch = number_from_daq; > if (delayed) > ch <<= 4; > > rather then a more expensive modulus calculation: > > UShort_t ch = number_from_daq; > if (delayed) > ch %= 100; > > I believe using the bit shift is more "natural". And if you really > want to start in 0 rather then 1, you can just add 1 afterwards. > > BTW, IMHO, I think the 1 based scheme is enterily > confusing. Everything else that we do is zero based, so why not have > the ADC/TDC channels be zero based as well? > > Anyway, that's my two pennies worth. > > Christian ----------------------------------------------------------- > Holm Christensen Phone: (+45) 35 35 96 91 > Sankt Hansgade 23, 1. th. Office: (+45) 353 25 305 > DK-2200 Copenhagen N Web: www.nbi.dk/~cholm > Denmark Email: cholm@nbi.dk -- Konstantin Olchanski Physics Department, Brookhaven National Laboratory, Long Island, New York olchansk@bnl.gov
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